The present invention relates to semiconductor techniques, and particularly to a technique of isolating elements which can be effectively utilized for the formation of element-isolating regions in a semiconductor integrated circuit device, for example.
Elements in a seminconductor integrated circuit device are conventionally isolated by a pn junction isolation method using diffusion layers, or by an oxidation film isolation method utilizing a local oxidation film formed over the surface of the substrate. With these isolation methods, however, the widths of the isolation regions are relatively wide, so that as the elements become smaller, the isolation regions occupy a proportionally larger area. This makes it difficult to increase the density of LSI devices. The applicants have therefore proposed an isolation technique called the U-groove isolation method whereby portions that act as isolation regions between the active regions of elements are cut to form U-shaped grooves (like a moat or trench, hereinafter referred to as U-grooves). A silicon dioxide film is formed within the U-grooves which are then filled with polycrystalline silicon. This forms element-isolating regions.
According to this U-groove isolation method, the surfaces of the polycrystalline silicon filling each U-groove must be thermally oxidized to form a silicon dioxide film. This prevents short-circuiting between the polycrystalline silicon in the U-grooves and the wiring formed on the surface of the substrate, or the electrodes formed in the vicinity of the wiring.
However, the oxidation of the surface of polycrystalline silicon in the U-shaped grooves results in an increase in volume, and stresses are generated which expand the openings of the U-grooves. These stresses distort the boundaries between each U-groove isolation region and the semiconductor region. Therefore, dislocations develop in the monocrystalline silicon and spread through the crystal to destroy the pn junctions of the elements.
For that reason, the applicants have developed the technique described below. As shown in FIG. 1, a silicon nitride film (Si.sub.3 N.sub.4 film) of a high hardness is formed over the inner surface of a silicon dioxide film 3 formed within a U-shaped isolation groove 2 provided in the surface of a semiconductor substrate 1. When a silicon dioxide film 6 is formed over the surface of polycrystalline silicon 5 filling the U-groove 2, the silicon nitride film 4, of high hardness, absorbs the stresses produced by the expansion of the silicon dioxide film 6. This prevents the transmission of stress to the outer silicon crystal, and prevents the development of dislocations.
This technique has been disclosed in, for example, the journal "NIKKEI ELECTRONICS", March 29, 1982, No. 287, pp. 90-101.